The AEHR ATX-32000 is a semiconductor test system engineered for wafer-level testing and burn-in of integrated circuits across multiple device architectures. It delivers full functional test capability during burn-in with high-density signal and power architecture enabling massively parallel testing. The system supports wafer-level, singulated die, and packaged part testing while maintaining stimulus and sensing performance for high-volume manufacturing environments.
Technical Specifications
Test Architecture & Channels
• Up to 128 bi-directional digital I/O channels
• Up to 25 MHz vector clock
• Universal Channel Architecture—any channel configurable as I/O, Power Supply, Clock, or PPMU resource
• Thousands of resources available for full-wafer testing
Protocol & Device Support
• Protocol-aware testing: SPI, I2C, PSI5
• Optical sensing capability for silicon photonics devices (VCSELs, LEDs)
• Optimized for Design for Test (DFT) and Built-In Self-Test (BIST)
• Supports AI processors, silicon photonics, memory, and power semiconductors (SiC, GaN)
Power Delivery
• Up to 2,000 watts per device in select configurations
• High-power device support with liquid thermal control
Thermal Management
• High thermal capacity chambers with uniformity and airflow
• Narrow and Wide chamber options for production floor flexibility
• Liquid thermal control system for heat transfer from wafer devices into thermal chuck
• Individual device-level thermal control
– Key Features
• Full functional verification during burn-in cycles
• High parallelism architecture for throughput optimization
• Wafer-level, die, and packaged part versatility
• Integrated light-sensing for photonics validation
• Flexible chamber configurations
– Typical Applications
AI and machine learning accelerators, silicon photonics (VCSELs, LEDs), DRAM and NAND memory, power conversion devices (SiC/GaN MOSFETs), mixed-signal integrated circuits.
– Compatibility & Integration
Designed by Aehr Test Systems, a 45+ year industry veteran holding numerous patents in burn-in and semiconductor test technology.
