The Tektronix BA1600 is a dual-function Bit Error Rate Tester (BERT) operating up to 1.6 Gb/s that combines pattern generation with error analysis for high-speed digital communication system testing. The instrument integrates advanced physical layer testing with a user interface designed to deliver signal integrity insights and bit error rate performance across sophisticated electronic designs.
Technical Specifications
Data Rate and Pattern Generation
• Maximum data rate: 1.6 Gb/s
• Pseudo-random binary sequence (PRBS) pattern support
• User-defined patterns up to 8 Mb via built-in editor or PATLING pattern generation language
• Built-in clock source with external clock input capability
• External trigger capability for pattern sequence restart and packet-type data transmission
Error Analysis and Jitter Measurement
• Bit error detection with sampling oscilloscope-exceeding accuracy
• Error Mapping (MAP), Error Correction Coding (ECC) emulation, pattern-dependent error analysis, error burst analysis, and error-free interval analysis
• ANSI jitter measurements: Random Jitter (RJ), Deterministic Jitter (DJ), and Total Jitter (TJ)
• Jitter impact analysis at BER of 10⁻¹²
• BER Contour Analysis with eye diagram opening measurement and extrapolation to lower BER levels
• Integrated BER-correlated eye diagram analysis with pass/fail masks and automatic measurements
• Q-Factor measurement for vertical eye opening analysis
• Error location pinpointing with eye diagram, pattern sensitivity, and error-free interval correlation
Electrical and Signal Characteristics
• Adjustable amplitude, offset, logic threshold, and termination for receiver stress testing
• Differential and single-ended I/O
– Key Features
• Fast eye mask testing for rapid signal integrity assessment
• Pattern-dependent error characterization
• Block error analysis
• Externally triggered multi-generator synchronization
– Typical Applications
• High-speed digital communication system verification and debugging
• Physical layer characterization and signal integrity testing
• Receiver design stress testing and validation
– Compatibility & Integration
Externally supplied clock input and external trigger inputs enable integration with external synchronization and multi-instrument test setups.
