The Tektronix BSA17500C BERTScope is a high-performance Bit Error Rate Analyzer engineered for validation of high-speed serial communication systems operating from 1 Gb/s to 17.5 Gb/s. This instrument delivers error detection, counting, and location analysis to isolate performance limitations in transceivers, interconnects, and communication channels. With integrated jitter analysis, flexible pattern generation, and patented error location capabilities, the BSA17500C enables rapid characterization of deterministic versus random error mechanisms.
Technical Specifications
• Data Rate: 1 Gb/s to 17.5 Gb/s; BER measurements to 28.6 Gb/s
• Clock Outputs: 1–17.5 GHz main path; sub-rate outputs 0.250–3.575 GHz
• Jitter Measurement: Total Jitter (TJ), Random Jitter (RJ), and Deterministic Jitter (DJ) per industry standards
• Sinusoidal Jitter Generation: 1 kHz to 100 MHz internal frequency range
• Pattern Memory: Flexible sequencing with two-level loop nesting and up to 1 million iterations per loop
– Key Features
• Spread Spectrum Clocking (SSC): Generator clock path with adjustable SSC modulation for SATA, PCI Express, and SAS compliance; optional clock recovery with waveform display and measurement
• Patented Error Location Analysis™: Isolates error bursts, error-free intervals, and pattern-dependent behavior for rapid root-cause identification
• Jitter Decomposition: Optional long-pattern (PRBS-31) jitter analysis with comprehensive component breakdown
• MJSQ Methodology: One-button measurements aligned to industry jitter standards
• Eye Diagram Analysis: Integrated visualization with BER correlation; PatternVu option includes software FIR filtering for post-equalization eye views and CleanEye nondeterministic jitter removal
• Mask Testing & Q-Factor: Physical layer validation with jitter peak, BER contour, and Q-factor analysis using standard or user-defined tolerance templates
– Typical Applications
• Transceiver characterization and validation
• High-speed serial link performance assessment
• Channel and interconnect analysis
• Standards-compliant jitter and BER testing
– Compatibility & Integration
The BSA17500C supports standard and proprietary pattern libraries with flexible memory architecture, enabling adaptation to emerging serial communication standards and custom test requirements.
