The Tektronix CR125A is a 12.5 Gb/s clock recovery instrument engineered for precision extraction and timing analysis of high-speed serial data streams. It delivers instrumentation-quality clock recovery with a “Golden PLL” response for standards compliance testing, making it essential for verification and characterization of high-speed digital systems in communication and data storage applications.
Technical Specifications
Data Interface
• 50 Ω differential or single-ended, DC coupled inputs via APC 3.5 planar crown connector
• Data rate coverage: 150 Mb/s to 12.5 Gb/s
• Input sensitivity: 100 mV single-ended typical; 50 mV differential typical
• Input voltage range: −5 V to +5 V
• Data insertion loss: 2 dB minimum, 2.6 dB typical, 3 dB maximum
• Equalization range: 0 to 10 dB
• Measured edge density accuracy: ±1% up to 14.3 Gb/s; ±3% above 14.3 Gb/s
Clock Output
• 50 Ω single-ended, AC coupled
• Full-rate clock output to 14.3 Gb/s
• Half-rate clock output from 14.3 Gb/s to 17.5 Gb/s
• Selectable divide ratios for full and divided outputs
Phase Lock Loop
• Loop bandwidth: 100 kHz to 12 MHz variable (optional 24 MHz for USB 3.0, SATA 6G, PCIe Gen3 JTF bandwidths)
• Loop bandwidth accuracy: ±10% at 1100 pattern
• Locking range: 50 MHz default, adjustable 10 MHz to 500 MHz
• Peaking: 0 to 6 dB from 500 kHz to 12 MHz; 0 dB from 100 kHz to 500 kHz
• Peaking accuracy: greater of ±10% of setting or 0.5 dB
• Frequency response: −20 dB/decade to −40 dB/decade
Jitter Performance
• Intrinsic jitter: 70 fs typical (800 mVp-p input, 10 Gb/s, 1010 pattern, 2 MHz loop bandwidth, 0.5 dB peaking)
• Jitter spectral analysis and frequency gated integrated jitter measurements
• Jitter display capability: 200 Hz to 90 MHz with cursor-based amplitude and frequency measurements
– Key Features
• Precision clock extraction across extended data rate range
• Configurable PLL loop parameters for standards-compliant jitter transfer function testing
• Optional PCIe 2.5, 5, and 8 Gb/s PLL loop analysis
• SSC (Spread Spectrum Clock) measurement and analysis
• User-replaceable connectors for field serviceability
– Typical Applications
• High-speed serial data characterization in telecommunications infrastructure
• Timing verification for PCIe, SATA, and USB 3.0 link testing
• Clock jitter analysis and PLL validation
• Data storage system timing measurement
– Compatibility & Integration
Designed for integration with BERTScope measurement systems and compatible with external test frameworks requiring precision clock recovery and jitter analysis instrumentation.
