The Tektronix PB200 is a packet BERT (Bit Error Rate Tester) that characterizes and validates high-speed digital communication links in packet-based systems. It generates and analyzes bit error rates up to 200 Mbits/s, supporting PRBS patterns, mixed-mode frames, and programmable word sequences for comprehensive protocol testing. The PB200 addresses component and sub-system development across TDMA, B-ISDN, FITL, ATM, satellite modems, and MPEG2 applications.
Technical Specifications
Data Rate and Pattern Generation
• Data rate: DC to 200 Mbits/s, NRZ-1
• Programmable word length and mixed-mode frames: 256 Kbits maximum, 8-bit resolution
• PRBS patterns: 2^N – 1 (N = 31, 23, 15, 11, 10, 9, 7)
• Mark density options: 1/8, 1/4, 1/2, 3/4, 7/8 via PRBS 2^10 – 1
Error Generation and Measurement
• Error injection: Single, Rate, External (TTL)
• Injected error rates: 10^-3 through 10^-7
• Bit error measurements: Window, Totalize, Timed Test, simultaneous 1’s, 0’s, and All Errors
• Field-select BER analysis: Overhead, payload, or both
Clock and Timing
• Internal synthesized clock: 1 Hz to 200 MHz, 1 Hz resolution, 10 ppm accuracy
• Programmable burst clock gap: Up to 16 Kbits maximum, 8-bit resolution
• Clock/data delay: Up to 32 ns in 20 ps increments
• Startup delay: 0 to 64 Kbits programmable
• Propagation delay measurement: Up to 128 Kbits
Signal I/O and Interfaces
• Data and clock outputs: NRZ format
• Input modes: Single-ended or differential; selectable data polarity (True/invert)
• Input compatibility: ECL, TTL, PECL
• Termination select: 50 Ohm to -2 V, +3 V, AC, or GND
• Threshold resolution: 10 mV steps
• External clock input: DC to 200 MHz, 0.5 to 5.0 V p-p, BNC, 50 Ohm termination selectable
• External clock reference input: 10 MHz, ±100 ppm maximum
• Data Delay Output: ECL, 50 Ohm source, BNC
• Error Detect Output: RZ, TTL, 50 Ohm source, BNC
• Discrete control inputs: Error Count Inhibit, Analyzer Clock Disable, Clock Disable, Data Inhibit (all ECL, 50 Ohm to -2 V, BNC)
• Remote control: IEEE 488.2 compatible (GPIB)
– Key Features
• Mixed-mode pattern generation for flexible test signal construction
• Simultaneous measurement of 1’s, 0’s, and all error types
• Programmable overhead/payload separation for protocol-specific testing
• Controllable gapped transmit clock for burst transmission scenarios
• Clock/data delay adjustment in fine 20 ps increments
– Typical Applications
TDMA systems, B-ISDN links, FITL deployments, ATM networks, satellite modem validation, MPEG2 protocol testing.
– Compatibility & Integration
GPIB remote control via IEEE 488.2 interface. ECL and TTL signal compatibility across all discrete I/O channels. Selectable 50 Ohm termination and AC coupling enable flexible system integration.
