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Texas Instruments / Burr-Brown JTAG 3/5V Parallel Port JTAG Emulator

SKU: JTAG 3/5VCategories: Embedded Test Systems
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The Texas Instruments/Burr-Brown JTAG emulator is a debugging tool that allows developers to program and debug embedded systems using a JTAG interface. It supports both 3V and 5V JTAG signaling and connects to the host computer via a parallel port. This emulator provides a basic debugging capability for simple JTAG targets.

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Equipment info

The Texas Instruments/Burr-Brown JTAG 3/5V Parallel Port JTAG Emulator is a hardware debugging tool for embedded systems development. It connects to a host PC via standard parallel port (SPP8, EPP, ECP) and interfaces with target systems through IEEE 1149.1 JTAG headers. The emulator supports both 3.3 V and 5 V JTAG signaling, making it suitable for diverse processor architectures across TI’s DSP and microcontroller portfolios.

Technical Specifications

• Host Interface: DB25 parallel port connector; supports SPP8, EPP, and ECP modes
• Target Interface: JTAG (IEEE 1149.1); 14-pin standard header plus support for TI 20-pin compact, 20-pin ARM, and 60-pin TI configurations via adapter boards
• TCK Frequency: Programmable up to 32 MHz
• JTAG Voltage Support: 3.3 V and 5 V signaling; target processor compatibility 1.8 V to 5 V
• Power Consumption: Up to 250 mA when powered by target system
• Emulation Controller: Advanced controller for high-performance debugging
• Boundary Scan: Programmable EMU0/EMU1 pins for Boundary Scan Test support; includes Wait-In-Reset features for TI DSP families (e.g., TMS27xx)
• Status Indicator: Single operational status LED

– Key Features

• Flexible dual-voltage JTAG support eliminates need for multiple tools across 3.3 V and 5 V target systems
• Multiple header configurations reduce adapter board requirements for common TI processor packages
• Programmable TCK frequency to 32 MHz enables optimization for target architecture timing constraints
• EMU0/EMU1 pin control supports both boundary scan testing and processor-specific wait-in-reset initialization sequences

– Typical Applications

• Development and debug of TI DSP systems (C2xx through C674x families)
• Firmware programming and real-time debugging on ARM-based and OMAP processors
• Hardware validation of DaVinci-based imaging platforms
• Boundary scan testing and in-circuit verification

– Compatibility & Integration

Works with TI C2xx, C24x, F240x, F28xxx, VC33, C4x, C5x, C54xx, C55xx, C6xxx, C64xx, C674x, TMS470, OMAP, and DaVinci processors. Host PC support includes Windows 98, NT 4.0, 2000, and XP. Integration with Texas Instruments Code Composer Studio (CCS) with specific software version documentation.

MPN

JTAG 3/5V

Frequency Range

TCK frequency up to 32 MHz

Voltage / Current Range

3.3 V and 5 V JTAG signaling; target processor 1.8 V to 5 V; up to 250 mA

Brand Name

Texas Instruments / Burr-Brown

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