The N4880A is a reference clock multiplier that synchronizes pattern generators in high-speed digital communication test systems to external clock signals with precise jitter tolerance control. Designed for R&D and manufacturing validation of PCI Express, MIPI M-PHY, and SD card UHS-II devices, it locks compatible BERT systems to a system reference clock, enabling accurate receiver characterization and standards compliance verification.
Technical Specifications
Clock Multiplication and Synchronization
• Multiplies reference clock frequencies including 19.2 MHz, 26–52 MHz, and 100 MHz
• Multiplying phase-locked loop with selectable bandwidth: 2 MHz to 5 MHz
• Transparent to 33 kHz spread spectrum clocking on reference inputs
• Tolerates low-frequency jitter within PLL loop bandwidth
• Differential input sensitivity: 100 mVpp
Supported Standards
• PCI Express 1.0, 2.0, 3.0
• MIPI M-PHY (gear 1–3)
• SD card UHS-II
Power and Environmental
• Maximum power consumption: 80 VA
• Input: Single-phase AC 100–240 V, 50–60 Hz (auto-selecting power supply)
• Operating temperature: 5–40 °C
• Maximum relative humidity: 95%
• Altitude: Up to 2000 meters
• Indoor use, installation category II, pollution degree 2
– Key Features
• Three 3.5 mm SMA female connectors (two differential inputs, one output)
• Standalone graphical user interface with USB remote control
• Software revision 7.20 or later required for remote operation
• Safety Class 1 with protective earth terminal
– Typical Applications
Jitter tolerance testing and receiver compliance validation for high-speed serial interfaces in chipset and host device development.
– Compatibility & Integration
Primarily designed for use with Agilent/Keysight J-BERT N4903B and ParBERT 81250A pattern generators.
