The Keithley KPCI-1802HC is a high-performance PCI bus data acquisition board engineered for industrial and scientific applications demanding simultaneous multi-channel analog input and output. The board acquires data at up to 333 kS/s per channel with 12-bit resolution and configurable differential or single-ended input architecture. On-board FIFO buffering, programmable gain switching, and multiple data transfer modes enable continuous operation in signal processing and data logging systems.
## Technical Specifications
**Analog Inputs**
• 32 differential or 64 single-ended channels (software configurable)
• 12-bit resolution; 2048-sample FIFO buffer
• Single-channel throughput: 333 kS/s; aggregate scanning: 312.5 kS/s
• Gain settings: 1, 2, 4, 8 (software selectable via 64-entry channel gain queue)
• Bipolar ranges: ±10 V (Gain 1), ±5 V (Gain 2), ±2.5 V (Gain 4), ±1.25 V (Gain 8)
• Unipolar ranges: 0–10 V (Gain 1), 0–5 V (Gain 2), 0–2.5 V (Gain 4), 0–1.25 V (Gain 8)
• Input overvoltage protection: ±15 V continuous (powered or unpowered)
• Input bias current: ±40 nA max. @ 25°C; ±60 nA max. over operating range
• Input impedance: >100 MΩ in parallel with ≤90 pF
• Linearity: ±1 LSB integral max.
• Common mode rejection: 74 dB (Gain 1), 79 dB (Gains 2–4), 84 dB (Gain 8) DC–60 Hz typical
**Analog Outputs**
• 2 channels; 12-bit resolution
• Range: ±10 V; ±5 mV typical accuracy (high impedance load)
• Output impedance: 4 Ω; maximum current: ±5 mA
• Maximum capacitive load: 100 µF; FIFO buffer: 16 samples
**Timing and Data Transfer**
• Internal pacer clock: 0.0012 Hz to 333 kHz
• External pacer clock: up to 333 kHz
• DMA (PCI bus master), interrupt, and polled transfer modes supported
• Programmable burst mode with configurable channel scan intervals
**Power and Interface**
• Power supply: +5 V, ±15 V required for external circuits
• PCI bus interface
## Key Features
• High-speed continuous data acquisition with on-board FIFO buffering
• Bus mastering DMA for efficient multi-channel transfers
• Channel gain queue enables non-sequential scanning at different gains
• Programmable burst mode emulates simultaneous sample-and-hold across channel scans
• Flexible triggering and gating control
## Typical Applications
• Complex signal processing and data logging tasks
• Multi-channel sensor data acquisition with varying signal ranges
• Industrial process monitoring and control systems
• Research instrumentation requiring high-speed analog I/O
## Compatibility & Integration
Connects directly to PCI bus architecture. Supports differential and single-ended sensor inputs, accommodating standard signal conditioning chain requirements across DC to low-frequency applications.
