The Stanford Research SIM910 is a JFET voltage preamplifier engineered for low-noise amplification of small signals from DC to 1 MHz. Built on the modular SIM platform, it integrates into the SIM900 mainframe or operates standalone with external DC supplies. The JFET front-end delivers exceptional performance with high input impedance (100 MΩ) and minimal bias current, making it ideal for high-impedance source measurements where noise and loading effects must be minimized.
Technical Specifications
Noise Performance
• Input noise voltage (RTI, gain ≥ 10): 4 nV/√Hz @ 1 kHz (typical)
• Input noise voltage (RTI, gain 1): 12 nV/√Hz @ 1 kHz (typical)
• Input current noise: <10 fA/√Hz (typical)
Frequency Response & Bandwidth
• Bandwidth: DC to 1 MHz
• -3 dB point: 1.9 MHz (typical)
• AC coupling: 16 mHz -3 dB frequency
Gain & Accuracy
• Selectable gain: 1 to 100 (1-2-5 sequence)
• Gain accuracy: ±0.5% (DC to 100 kHz); ±5% @ 1 MHz (typical)
• Gain stability: 200 ppm/°C
Input & Output Characteristics
• Input impedance: 100 MΩ || ~35 pF
• Common-mode rejection ratio: 85 dB
• Output voltage limits: ±10 V
• Dual parallel outputs (front and rear panel)
– Key Features
• Programmable gain adjustable via front panel or remote interface
• AC or DC coupling selectable
• Differential (A-B) or single-ended (A) input configuration
• BNC input connectors with floatable or grounded shields
• External power requirements: +5 VDC (100 mA max.), ±15 VDC (300 mA max.)
– Typical Applications
• Lock-in detection systems
• Piezoelectric and capacitive sensor readout
• Photocurrent amplification
• Low-level signal conditioning
– Compatibility & Integration
Connects to SIM900 mainframe via DB-15 rear panel connector. Operates standalone with external ±15 VDC and +5 VDC supplies.
