The Agilent/Keysight 16712A is a timing and state analysis module for the 16700 Series logic analysis systems. It delivers simultaneous state and timing analysis through a single probe, eliminating the need for separate probing solutions and enabling fully time-correlated measurements across multiple signal domains. The module captures up to 204 channels simultaneously with 128K samples per channel memory depth, supporting both state and timing functions on different channels within the same measurement window.
Technical Specifications
• State Analysis Clock Rate: 100 MHz
• Timing Analysis Clock Rate: 500 MHz
• Memory Depth: 128K samples per channel
• Maximum Simultaneous Channels: 204 channels
• Channel Functionality: State or timing analysis per channel
– Key Features
• Time-correlated state and timing analysis on different channels within a single capture
• Unified probe interface supporting both state and timing measurements
• Configurable per-channel analysis mode—mix state and timing analysis in one acquisition
• 128K sample memory enables extended capture windows at operating clock rates
– Typical Applications
• Digital design debugging and validation
• Cross-domain signal correlation and timing analysis
• Protocol and bus-level signal verification
• Multi-clock domain verification
– Compatibility & Integration
Designed for integration into Keysight 16700 Series mainframes including models 16700A, 16700B, 16701A, 16701B, 16702A, and 16702B. All modules integrate tightly to provide time-correlated measurements across the logic analysis system. The module form factor is a plug-in card (approximately 14 lbs) that installs directly into a compatible mainframe.
