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Mercury Computer Systems IBM PowerPC 750 RACE Daughtercard

SKU: IBM PowerPC 750 RACECategories: Legacy / Obsolete Test Equipment
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The Mercury Computer Systems IBM PowerPC 750 RACE Daughtercard is a specialized processing unit designed for high-performance computing applications. Featuring the IBM PowerPC 750 processor, this daughtercard is engineered to deliver exceptional computational power and efficiency. It is ideal for integration into RACEway-based systems, providing a robust solution for demanding tasks such as signal processing, image processing, and data analysis.

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Equipment info

The Mercury Computer Systems IBM PowerPC 750 RACE Daughtercard is a specialized processing module engineered for high-performance computing within RACEway-based systems. Built around the IBM PowerPC 750 RISC processor, this daughtercard delivers superscalar execution capability with six functional units operating at frequencies up to 500 MHz. It integrates into Mercury’s modular architectures for signal processing, image analysis, and intensive computational workloads.

Technical Specifications

Processor Architecture
• IBM PowerPC 750 RISC microprocessor
• Superscalar design: executes two instructions simultaneously
• Six execution units: Floating-Point Unit (FPU), Branch Processing Unit (BPU), System Register Unit (SRU), Load/Store Unit (LSU), and two Integer Units (IU1, IU2)
• Operating frequency: 200 MHz to 500 MHz (variants available; 266 MHz on legacy processes; 350–400 MHz projected on advanced processes)

L1 Cache
• Instruction Cache: 32 KB, 8-way set associative, 32-byte line size, single-cycle access
• Data Cache: 32 KB, 8-way set associative, 32-byte line size, single-cycle access
• Replacement policy: Pseudo-LRU; write policy: copy-back or write-through (page-selectable)

L2 Cache Interface
• Supports external L2 SRAM configurations: 256 KB, 512 KB, and 1 Mbyte
• PowerPC 750CX variant includes on-chip L2: 256 KB, 2-way set associative, 64-byte line size
• Core-to-L2 frequency divisors: ÷1, ÷1.5, ÷2, ÷2.5, ÷3

Memory Management Unit (MMU)
• Instruction and Data TLBs: 128 entries each, 2-way set associative
• Page support: 4 KB pages, variable-sized blocks, 256 MB segments
• Block Address Translation (BAT): 4 instruction BATs and 4 data BATs

Power Management
• Multiple power-saving modes: doze, nap, sleep, dynamic power management
• Integrated Thermal Management Assist Unit with on-chip thermal sensor

– Key Features

• Modular daughtercard design optimized for RACEway system integration
• Dual-instruction per cycle superscalar execution
• Flexible L2 cache configuration supporting external SRAM or on-chip implementations
• Advanced thermal monitoring and dynamic power control
• Virtual memory management with flexible page sizing and BAT support

– Typical Applications

Signal processing, complex image analysis, and high-performance data computation in embedded real-time systems.

– Compatibility & Integration

Designed for Mercury’s modular RACEway-based system architectures.

MPN

IBM PowerPC 750 RACE

Frequency Range

200 MHz to 500 MHz

Brand Name

Mercury Computer Systems

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