The Agilent/Keysight 16601A is a mainframe accessory that extends the analytical capabilities of compatible logic analyzer systems. This modular component integrates into Agilent/Keysight 1660E/ES/EP series platforms to enable advanced digital circuit analysis, timing capture, and complex trigger sequencing for functional testing and debugging of digital systems.
Technical Specifications
• Maximum conventional timing rate: 125 MHz
• Maximum timing rate (half-channel mode): 250 MHz
• Memory depth per channel (normal): 64 KB
• Memory per channel (half-channel mode): 128 KB
• Channel-to-channel delay: 2 ns
• Setup/hold time: 4.5 ns
• Maximum trigger sequence levels: 12
• Maximum trigger sequencing rate: 100 MHz
• Pattern recognizers: 10
• Range recognizers: 2
• Counter timers: 2
• Input impedance: 100 kΩ
• Input capacitance: 8 pF
• Power input: Universal (auto-sense and switch)
– Key Features
• 23 predefined trigger sequences with graphical representations and plain language descriptions
• Transitional timing captures data bursts separated by long time periods
• Dual-mode memory architecture optimizes channel count versus depth tradeoffs
• Multiple trigger levels and recognizers support complex state machine verification
• Output in ASCII, PCX, TIFF, and EPS formats
– Typical Applications
• Digital circuit timing analysis and characterization
• State machine verification and debugging
• Multi-channel bus protocol analysis
• Functional test stimulus with integrated pattern generation (EP series)
– Compatibility & Integration
The 16601A integrates with Agilent/Keysight 1660E/ES/EP series logic analyzers. When paired with 1660EP models, the system provides 32-channel pattern generation at 100 M vector/sec with 256 K vector depth capability. Interfaces include Ethernet (IEEE 802.3), HP-IB, RS-232, and Centronics printer connection. Remote operation and data transfer supported via X-Windows, FTP, and NFS.
Note: This product reached end of production February 1, 2000, and end of support May 1, 2005.
