The Teledyne LeCroy M5X Protocol Analyzer for PCI Express® 5.0 captures, decodes, and analyzes PCIe traffic across multiple generations and link configurations. Built for engineers developing high-speed serial interfaces, it delivers protocol compliance verification and design debugging across data rates from 2.5 GT/s to 32.0 GT/s. The analyzer supports PCIe 4.0 at x16 widths and PCIe 5.0 at x8 widths, with configurable memory up to 128 GB for extended recordings and full layer decoding from FLIT through CXL Message levels.
Technical Specifications
• Data Rates: 2.5 GT/s, 5.0 GT/s, 8.0 GT/s, 16.0 GT/s, 32.0 GT/s
• Link Width Support: PCIe 4.0 up to x16; PCIe 5.0 up to x8. Direct tapping at 32.0 GT/s supports up to x8. Inline probing supports x1, x2, x4, x8, x16 up to 16.0 GT/s
• Memory Buffer: Configurable up to 128 GB
• Control Interface: USB or 1000-BaseT Ethernet (100/1000 Mbps)
• Operating Systems: Windows 10, Windows 8, Windows 7, Windows Server, Windows Server 2008R2
– Key Features
• Protocol Support: PCIe 4.0/5.0, Gen-Z, CCIX, CXL (CXL.io, CXL.mem, CXL.cache), NVMe, NVMe-MI, SATA Express, SCSI Express
• Jamming Capability: Protocol-compliant packet modification, insertion, replacement, and deletion within PCIe operating specifications; supports Gen-Z jamming
• Multi-Protocol Decoding: Transaction Layer Packets (TLPs), Data Link Layer Packets (DLLPs), primitives, and full CXL layer decoding from FLIT to Message layers
• Probing Options: Inline and direct tapping methodologies; horizontal insertion design eliminates traditional interposer requirements for server systems
• CrossSync Synchronization: Time-aligned packet capture and cross-triggering with other Teledyne LeCroy high-speed protocol analyzers
– Typical Applications
High-performance computing, cloud infrastructure, AI system development, and PCIe 5.0 endpoint/root complex validation.
– Compatibility & Integration
Connects via USB or Ethernet. Integrates with Teledyne LeCroy analyzer portfolio through CrossSync for multi-bus correlation.
