The Measurement Computing / Data Translation DT301 is a PCI bus multifunction data acquisition board engineered for analog and digital signal measurement in laboratory, industrial, and research applications. It delivers 16 single-ended or 8 differential analog inputs at 12-bit resolution with a maximum sample rate of 225 kS/s, supporting flexible input ranges from ±1.25 V to ±10 V bipolar and 0–10 V unipolar. The board incorporates 23 digital I/O lines with high-speed dynamic input capability, time-stamping relative to analog acquisition, and four 16-bit user counter/timers plus two 24-bit dedicated counters for system clocking and triggering. PCI bus-master architecture enables high-speed data transfer without CPU intervention, eliminating interrupt overhead and preserving system resources. Software-calibrated analog inputs achieve 11.5-bit ENOB across the input subsystem. Flexible triggering modes—post-trigger, pre-trigger, and about-trigger—accept digital TTL or software sources. Internal clocking spans 1.2 S/s to 225 kS/s; external sources and cascaded timers accommodate slower acquisition rates. All signals interface through a single 68-pin backplate connector, simplifying integration into existing measurement systems.
Technical Specifications
Analog Inputs
• 16 single-ended or 8 differential channels
• 12-bit resolution; 11.5-bit ENOB
• Bipolar ranges: ±1.25 V, ±2.5 V, ±5 V, ±10 V
• Unipolar ranges: 0–1.25 V, 0–2.5 V, 0–5 V, 0–10 V
• Maximum sample rate: 225 kS/s
• 1024-location channel-gain list for multi-gain sampling
• Software-calibrated analog input subsystem
• Pseudo-differential inputs via Amp Low common reference
Digital I/O & Counter/Timers
• 23 total digital I/O lines
• High-speed dynamic digital inputs with time-stamping
• Digital output: 12 mA sink, 15 mA source
• Four 16-bit user counter/timers
• Two 24-bit dedicated counter/timers (A/D clocking and triggering)
• Event counting, frequency measurement, and one-shot/frequency pulse generation
• Configurable duty cycle, frequency, and polarity
– Key Features
• PCI bus-master data transfer eliminates CPU bottlenecks
• No interrupts required; streamlines system integration
• Flexible triggering: post-trigger, pre-trigger, about-trigger modes
• Clocking from 1.2 S/s to 225 kS/s (internal); external sources supported
• Cascadable counter/timers for extended functionality
• Single 68-pin connector simplifies wiring
– Typical Applications
Multi-channel signal acquisition, real-time process control, data logging, frequency analysis, event detection, and synchronized analog-digital measurement in test laboratories and field instrumentation.
– Compatibility & Integration
PCI bus interface; software calibration; supports multiple development environments.
