The Tektronix CR175A is a clock recovery instrument engineered for signal integrity analysis and standards compliance testing in high-speed serial data applications. It extracts clock signals from complex data streams with instrumentation-grade accuracy across 150 Mb/s to 17.5 Gb/s, supporting modern I/O standards including PCIe 3.0, 10GBASE-KR, 16xFC, 25/28 G CEI, and 100GBASE-LR-4/ER-4.
Technical Specifications
• Data Rate Coverage: 150 Mb/s to 17.5 Gb/s inherent; expandable to 28.6 Gb/s with options
• Clock Recovery: Instrumentation-quality clock recovery with variable loop bandwidth from 100 kHz to 12 MHz; optional 24 MHz for USB 3.0, SATA 6G, and PCIe Gen3 jitter transfer function compliance
• Clock Outputs: Full-rate clock to 14.3 Gb/s; half-rate clock from 14.3 Gb/s to 17.5 Gb/s and up to 28.6 Gb/s; selectable divide ratios
• Input Sensitivity: 40 mV amplitude single-ended; 20 mV amplitude differential (HS option). Standard configuration includes DC-coupled data through path
• Loop Bandwidth Adjustment: 2.5 kHz to 12 MHz variable; locking range 50 MHz default, adjustable 10 to 500 MHz
• Peaking: 0–6 dB from 500 kHz to 12 MHz; 0 dB from 100 kHz to 500 kHz; first- and second-order roll-off (–20 to –40 dB/decade)
• Intrinsic Jitter: 70 fs typical; 250 fsRMS maximum at 800 mVp-p input, 10 Gb/s, 1010 pattern
– Key Features
• Programmable peaking and PLL loop bandwidth with self-measurement and display for standards compliance
• Built-in equalizer for clock recovery under high inter-symbol interference conditions
• Spread spectrum clocking (SSC) support with tracking to ±5000 ppm frequency excursion
• Direct dF/dt display with parametric measurement of minimum/maximum peaks for SSC modulation diagnostics
– Typical Applications
• Serial ATA, SAS, and PCI Express signal integrity analysis
• USB 3.0 and SATA 6G jitter transfer function compliance testing
• 100 Gigabit Ethernet receiver characterization
• High-speed serial link clock extraction under signal degradation
