The HP/Agilent 81133A is a single-channel pulse pattern generator delivering precise signal generation from 15 MHz to 3.35 GHz. Engineered for high-speed digital circuit validation and communication system testing, this instrument generates NRZ, RZ, R1, and DNRZ data formats with pattern memory depths up to 12 Mbit per channel. It combines low jitter performance—1.5 ps typical—with programmable jitter emulation to ± 250 ps, enabling realistic signal integrity assessment and stress testing of receiver circuits.
## Technical Specifications
**Frequency & Timing**
• Operating frequency: 15 MHz to 3.35 GHz
• Pulse period range: 298.5 ps to 66.6 ns
• Internal clock period resolution: 0.001 ps
• Transition time (20% to 80%): <60 ps typical
• RMS jitter: 1.5 ps typical
• Frequency divider options: 1, 2, 4, 8, 16, 32, 64, 128
**Output Characteristics**
• Output amplitude: 50 mV to 2.00 Vpp
• Output impedance: 50 Ω nominal
• Level window: -2.00 V to +3.00 V
• Overshoot/ringing: <10% + 10 mV (differential outputs)
• Short circuit current: -80 mA to +120 mA nominal
• Variable crossover point: 30% to 70% typical
**Data Generation**
• Pattern memory: 8 Kbit standard; 12 Mbit extended per channel
• PRBS capability: 2^5-1 through 2^31-1
• Operating modes: Square (50% duty cycle), Pulse, Data, Burst
• Jitter modulation: ± 250 ps or ± 25 ps selectable
**Environmental**
• Operating temperature: 0 to 55 °C
• Humidity: Maximum 95% RH
• Altitude: Up to 2000 m
## Key Features
• Single-channel architecture with 8 Kbit or extended 12 Mbit pattern memory
• Programmable jitter emulation up to ± 250 ps for receiver margin testing
• AC-coupled clock input with 50 Ω impedance and optional DC termination
• External trigger and delay control inputs for synchronized operation
• Support for ECL, LVPECL, and LVDS logic families
## Typical Applications
• High-speed digital circuit characterization and validation
• Serial communication system receiver stress testing
• Signal integrity measurements and jitter analysis
• PRBS pattern generation for bit error rate testing
• Clock and data distribution network emulation
## Compatibility & Integration
• Remote control via GPIB, LAN, or USB 2.0
• Integrates with Keysight 54850A and 86100C DCA-J oscilloscopes
• Compatible with ECL, LVPECL, and LVDS output termination schemes
