The Tektronix DTG5334 is a benchtop pattern generator delivering up to 3.35 Gbps in NRZ mode, engineered for high-speed digital device characterization and validation. This modular platform integrates data generation, pulse generation, and DC source functionality within a 4-slot mainframe architecture supporting cold-swappable output modules. Engineers can configure 1 to 96 data channels by cascading up to two DTG5334 mainframes in Master-Slave configuration, scaling test capacity without sacrificing timing precision or pattern complexity.
Technical Specifications
Data Generation:
• Maximum data rate (NRZ): 3.35 Gbps (settable to 3.4 Gbps)
• Maximum data rate (RZ, R1, Pulse mode): 1.675 Gbps (settable to 1.7 Gbps)
• Pattern depth per channel: Up to 64 Mb
• Data rate resolution (internal clock): 8 digits
• Data rate resolution (external clock/phase lock): 4 digits
• Number of data channels: 1 to 96 (Master/Slave configuration)
Timing Control:
• Delay resolution: 0.2 ps
• Total delay: Up to 600 ns
• Differential timing offset range: −1 ns to 1 ns
• Differential timing offset resolution: 0.2 ps
• Semiautomatic deskew calibration range: 500 ps
• Deskew calibration accuracy: 100 ps (slots A to D)
Signal Shaping:
• Duty cycle adjustment range: 0% to 100% (RZ, R1, Pulse mode)
• Duty cycle adjustment resolution: 0.1%
• Pulse width range: 290 ps to (period − 290 ps)
• Pulse width resolution: 5 ps
• Cross-point adjustment (duty cycle distortion): 30% to 70%, 1% resolution
• Level control resolution: 5 mV
Jitter Generation:
• Jitter profiles: Sine, Gaussian Noise, Square, Triangle
• Jitter frequency range: 0.015 Hz to 1.56 MHz
• Jitter frequency resolution: 1 mHz
• Jitter amplitude: Up to 16.5 UIpk-pk
• Internal jitter generation: Channel A1 only
• External jitter injection: DTGM31, DTGM32 modules
– Key Features
• Windows 2000 Professional operating system with intuitive UI
• Variable edge slew rates via DTGM10 modules
• Output modules: DTGM32 provides 1.25 Vp-p (50 Ω) / 2.5 Vp-p (1 MΩ) amplitude
– Typical Applications
• High-speed serial link validation and stress testing
• Clock and data pattern generation for system characterization
• Jitter injection and tolerance analysis
• Multi-channel synchronized data generation
– Compatibility & Integration
The mainframe supports four plug-and-play module slots (A, B, C, D). Master-Slave operation allows two units to operate synchronously, enabling expanded channel counts and complex test scenarios requiring tight timing correlation across multiple output paths.
