The NI PXIe-6738 is a 32-channel PXI Express analog output module engineered for precision signal generation in automated test systems. It delivers 16-bit resolution across all channels with programmable output ranges from −10 V to +10 V, supporting four-quadrant source and sink operation. The module achieves update rates up to 1 MS/s on individual channels, 1 MS/s across 8 channels (one per bank), or 350 kS/s across all 32 channels simultaneously. A 65,535-sample FIFO buffer enables flexible waveform buffering and streaming applications.
Technical Specifications
Analog Output Performance
• 32 voltage output channels, 16-bit resolution (1 in 65,536 steps)
• Output voltage range: −10 V to +10 V (programmable ranges available)
• Maximum update rates: 1 MS/s (single or 8-channel), 350 kS/s (32-channel)
• Output impedance: 0.2 Ω; output current drive: ±10 mA
• Slew rate: 3.0 V/µs; settling time: 15 µs to ±4 LSB
• Noise: 1.0 mV RMS (DC to 1 MHz)
• Short-circuit protection to ground
• FIFO buffer: 65,535 samples
Timing & Synchronization
• 4 counters/timers with gate, source, and auxiliary functions
• Digital triggering and PXI Express synchronization
• Reference signal locking: PXI_STAR (10, 20 MHz), PXIe-CLK100 (100 MHz), PXI_TRIG (10, 20 MHz), PFI (10, 20 MHz)
• 10 digital I/O lines
Accuracy
• Warranted for up to 2 years post-external calibration, within 10 °C of last calibration
– Key Features
• Four-quadrant output operation supports both source and sink applications
• Per-bank update glitch isolation for synchronized multi-channel waveforms
• Modular PXI Express integration with advanced triggering and synchronization
• Flexible reference clock inputs for system timing alignment
– Typical Applications
Automated functional test, precision signal generation, synchronized multi-channel waveform synthesis, and integrated measurement systems combining analog output with digital triggering and counter functions.
– Compatibility & Integration
Full PXI Express module compatibility with digital triggering and external clock synchronization across distributed test architectures.
