The Tektronix 1240 is a configurable logic analyzer designed for debugging and analyzing complex digital systems. Its modular architecture accommodates one to four acquisition boards, supporting up to 72 channels of digital data capture. The instrument combines dual independent timebases to correlate synchronous and asynchronous data, making it ideal for integrated hardware/software analysis. Engineers can select from 1240D1 (9-channel) or 1240D2 (18-channel) acquisition cards based on system requirements, configuring the instrument to match specific measurement needs.
Technical Specifications
• Acquisition Channels: Up to 72 configurable channels (1240D1: 9 channels; 1240D2: 18 channels per card)
• Sampling Rates: 100 MHz asynchronous, 50 MHz synchronous
• Glitch Detection: 6 ns minimum detectable pulse width (1240D1)
• Memory: 64K DRAM control processor memory; 4,096 samples per channel acquisition depth
• Triggering: 14-level trigger sequencer with conditional branching; Edge, Pattern, State, Transition, and Glitch trigger modes; Simple, Compound, and Qualified trigger conditions
• Processors: Intel 8088 control processor; Zilog Z80A I/O processor
• Display: 7-inch monochrome raster-scan CRT with tabular, waveform, and listing formats
• User Interface: 50+ soft keys with four operational skill levels
– Key Features
• Dual timebases for correlating synchronous and asynchronous digital activity
• Microprocessor analysis with mnemonic disassembly (8-bit, 16-bit, 32-bit processors via ROM pack)
• Eight-level pattern search and memory compare with highlighting
• Flexible channel grouping and standard display radices (ASCII, EBCDIC)
• Plug-in ROM and RAM cartridge slots for configuration storage and processor support
• Nonvolatile memory retains two complete instrument setups
• Optional COMM Pack (1200C01) with RS232C interface for external communications
– Typical Applications
• Complex digital system debugging and integration
• Microprocessor-based hardware/software analysis
• State machine and timing analysis
• Bus protocol capture and decode
– Compatibility & Integration
Acquisition board options (1240D1, 1240D2) support variable channel densities and sampling requirements. ROM packs (12RMxx series) enable processor-specific disassembly. RAM packs with battery backup (8K, 64K) store configurations. Rear and side cartridge interfaces accept I/O and memory expansion modules.
