The Tektronix AWG520 is a dual-channel arbitrary waveform generator delivering 1 GS/s sample rate for precise creation of complex custom waveforms. Built-in graphical editing integrates with hardware output capabilities, enabling efficient waveform development and rapid what-if testing. The instrument generates signals from 20 mVp-p to 2 Vp-p into 50 Ω loads with 10-bit vertical resolution and supports waveforms up to 4,194,048 points. Internal 3 GB hard disk storage accommodates extensive waveform libraries and sequence programming up to 8,000 steps. Ideal for communications, aerospace, defense, and R&D applications demanding high-fidelity signal generation.
Technical Specifications
Waveform Generation & Memory
• Sampling frequency: 50 kHz to 1.0 GHz (8-digit resolution, ±1 ppm accuracy)
• Waveform length: 256 to 4,194,048 points (multiples of four)
• Waveform memory: 4,194,048 10-bit words
• Marker memory: 4,194,048 words (4 markers × 1 bit)
• Sequence memory: Up to 8,000 steps with repeat counters from 1 to 65,536 or infinite
• Storage: 3 GB internal HDD (standard)
Output per Channel
• Amplitude range: 20 mVp-p to 2 Vp-p (50 Ω load, 1 mV resolution)
• DC offset: -2 V to +2 V (50 Ω load)
• Output impedance: 50 Ω
• Amplitude accuracy: ±0.1 V ±5% of setting
• Rise/fall time (10%–90%): ≤2.5 ns (>1.0 Vp-p); ≤1.7 ns (≤1.0 Vp-p)
• Harmonics: ≤-50 dBc (DC to 400 MHz)
• Noise: ≤-53 dBc (DC to 400 MHz)
• Phase noise: ≤-90 dBc/Hz at 10 kHz offset
Clock & Synchronization
• Internal clock accuracy: ±1 ppm; phase noise -80 dBc/Hz (10 kHz offset), -100 dBc/Hz (100 kHz offset)
• External clock input: 10 MHz to 900 MHz, 0.25 Vp-p to 1 Vp-p, 50 Ω AC coupled
• 10 MHz reference: 10 MHz ±0.1 MHz, 0.2 V to 3.0 Vp-p, 50 Ω AC coupled
Trigger Input
• Impedance: 1 kΩ or 50 Ω
• Input voltage: ±10 V (1 kΩ); ±5 V (50 Ω)
• Threshold: -5.0 V to 5.0 V (0.1 V resolution, ±5% + 0.1 V accuracy)
• Minimum pulse width: 10 ns
– Key Features
• Dual independent channels with synchronized or asynchronous operation
• Graphical waveform editor for rapid design and validation
• 4 marker outputs per channel for triggering and synchronization
• External clock and 10 MHz reference inputs for system integration
• Programmable trigger holdoff and delay capabilities
– Typical Applications
• Communications system verification and characterization
• Aerospace and defense signal simulation
• High-speed circuit validation
• Research and development prototyping
